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Kevin Skadron

Kevin Skadron

Professor of Computer Science

Phone: (434) 982-2200
Fax: (434) 982-2214
Email: skadron@cs.virginia.edu
Home Page: Kevin Skadron

Department of Computer Science
School of Engineering and Applied Science
University of Virginia
151 Engineer‘s Way, P.O. Box 400740
Charlottesville, Virginia 22904-4740

"Sequentiality is an illusion."

Areas Of Interest

Computer architecture, especially: multi-core and multi-threaded chip architectures, CPU/GPU convergence, and novel processor organizations; architectures for managing power, temperature, and reliability; applications of control theory to computer architecture; and architectural modeling and simulation methodology.

Biographical Sketch

Kevin Skadron received his Ph.D. in Computer Science from Princeton University in 1999. He joined the University of Virginia as Assistant Professor in 1999, was promoted to Associate Professor in 2005, and to Professor in 2010. He spent the 2007-08 academic year on sabbatical at NVIDIA Research.  Skadron is a senior member of the IEEE and a Distinguished Scientist of the ACM.  He received the ACM SIGARCH Maurice Wilkes Award in 2011, an NSF CAREER Award in 2002, a Seven Society Teaching Award in 2002, University of Virginia Teaching Fellowship in 2003, and a UVa Excellence in Science and Technology award in 2002. Among other professional activities, he is founding associate editor-in-chief of IEEE Computer Architecture Letters and became editor-in-chief in 2010.  He also serves on the editorial board of IEEE Micro and on the technical advisory board of Gradient-DA. He was secretary-treasurer of ACM's SIGARCH for 2007-11 and has also served as technical program co-chair of PACT 2006, general co-chair for PACT 2002 and MICRO-37,  and co-organizer of the Workshop on Temperature Aware Computer Systems. Recent and upcoming conference activities include membership on the HPCA 2009, PACT 2009, ISCA 2010, ICS 2011, and ICS 2011 technical program committees. Skadron has also presented tutorials at a number of conferences, most recently at PACT 2011, ASPLOS 2010, ASPLOS 2008, Semi-Therm 2009, and Cool Chips 2008, and a keynote at SAAHPC 2011.  He has graduated six masters and eleven PhD advisees and co-advisees, and is author or co-author of over one hundred refereed papers and book chapters.


Skadron's research currently focuses on how to design multicore architectures in the presence of severe physical constraints, especially thermal, power delivery, process variations, and wear-out. His group is chiefly focusing on these issues in the context of asymmetric and heterogeneous designs, which provide the best balance between high single-thread performance and high throughput for parallel tasks.  Support for asymmetry is also becoming essential as process variations (chiefly "process tilt") create performance and power asymmetry even in organizations that were originally designed to be symmetric.  His group is also one of the first groups to explore the use of graphics processors (GPUs) for general-purpose computing and the first to develop an architectural simulation infrastructure-Qsilver-for performance, power, and thermal studies.  In addition to exploring the implications of heterogeneous organizations combining CPUs, GPUs, and other processor types, they are exploring how the massive parallelism of the GPU and its novel SIMD and memory organization can most effectively be used.  To address these questions, they are pursuing a variety of investigations, as well as developing the Rodinia benchmark suite.  Rodinia provides both optimized GPU and multicore-CPU implementations of a diverse set of applications.

Selected Publications

[Home page] [Full list of publications] [Rodinia] [HotSpot] [HotLeakage]